Cache Address

Creator
Created
Created
2019 Nov 5 5:17
Editor
Edited
Edited
2023 Jan 18 22:49
Refs
Refs

Physical address


Parameters

Tag is only chosen by cache size → at fixed else, portion of bits are chosen by set size (way)
log X = x, lower case is bit count in physical address
  • set(block at DMC) size B
  • Number of Sets S (s is (set) index)
  • block offset =log N (at N-way mapped cache)
  • byte offset = log (byte of block size)
 
wet usually get b by block size, and then get S by cache size and b. And then we have to know block offset n is not in address just for identify associative and order of block in set is not dependent to associative, is dependent to replacement policy so do not relevant to address in tag also.
  1. b = byte offset
  1. total cache size: B x S x (associative) byte
 
MMU(memory management unit):decoder decode virtual address to physical address Byte addressable: each byte has unique address, so most data unit is byte related to address
Why byte addressable
word addressable waste too much memory and bit addressable waste too much address
 
 
 
 
 

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