Cache Side-Channel Attack

Creator
Creator
Seonglae ChoSeonglae Cho
Created
Created
2024 May 31 4:36
Editor
Edited
Edited
2024 Jun 7 4:29
Refs
Refs
CPU Cache
A side-channel attack is any attack based on information gained from the implementation of a computer system, rather than weaknesses in the implemented algorithm itself.
Timing information, power consumption, electromagnetic leaks, and sound are examples of extra information which could be exploited to facilitate side-channel attacks from inference.
notion image
  • Data cache footprint
  • Instruction cache footprint
CPU caches are shared between the victim and the attacker when
Multi-tenancy
systems are prevalent. (Deduplication by flushing)

Cache footprint for Cryptographic Operation

Revealing cryptographic keys in cryptographic operation by utilizing possible footprints. Data access footprint (e.g., S-box table in AES) or instruction access footprint (branches that depend on secret key) are them.
Cache Side-Channel Attacks

Prevention (Side channel mitigation)

  • Disable sharing like disable page deduplication, disable sharing cache via cache partitioning
  • Prefetching implementation for OpenSSL Version 1.0.0a pre-fetches the S-Box table at the start of each round
  • Put more data in a single cache line such as OpenSSL Version 1.0.0a uses a 256-byte S-box
  • Lower timer resolution for managed languages (This is the reason why most of high level languages do not provide accurate timer)
  • Secret independent execution flow/memory accesses
  • Prevent clflush in user-mode
    • PRIME+PROBE is still available tho
 
 
 
 
 

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